Silicon carbide has higher dielectric breakdown voltage than other semiconductor materials having wide band gaps. Therefore, silicon carbide is expected to be applied to low-loss power devices in these days.
If an upper part of silicon carbide is thermally oxidized, a good-quality silicon dioxide film is formed on silicon carbide. In view of this, the form of an insulated-gate semiconductor device is considered to be effective in fabricating silicon carbide semiconductor devices driven with high power.
If an MISFET using silicon carbide is used in a low-loss power semiconductor device, the interface state density in an interface region between a gate insulating film and a SiC substrate needs to be lowered for the purpose of reducing a loss by reducing an ON resistance. In the interface region between the gate insulating film and the SiC substrate, a transition layer in which carbon remains is formed, and there is a correlation between the transition layer and the interface state density. It is known that the thickness of the transition layer should be 1 nm or less in order to have an interface state density of 1×1012 [cm−2 eV−1] or less according to this correlation (K. Yamashita et al., ICSCRM 2001 Part2 (2001)).
In general, to form a thermal oxide film for a gate insulating film on silicon carbide, a silicon carbide substrate is exposed to an oxidizing gas atmosphere at a temperature of 1000° C. to 1400° C. In this thermal oxidation process, the behavior of carbon, which occupies about a half of the components of silicon carbide in terms of stoichiometry, is largely involved in the formation of the interface region between silicon carbide and the thermal oxide film, and thus affecting on electric characteristics of a device.